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10.30 Write DMA (Cah)
This command uses DMA mode to write from 1 to 256 sectors as specified in the Sector Count register. A sector
count of 0 requests 256 sectors. The transfer begins at the sector specified in the Sector Number Register. When
this command is issued the CompactFlash Storage Card sets BSY, puts all or part of the sector of data in the buffer.
The Card is then permitted, although not required, to set DRQ, clear BSY. The Card asserts DMAREQ while data is
available to be transferred. The host then writes the (512 * sector-count) bytes of data to the Card using DMA.
While DMAREQ is asserted by the Card, the Host asserts – DMACK while it is ready to transfer data by DMA and
asserts – IOWR once for each 16 bit word to be transferred from the Host.
Interrupts are not generated on every sector, but upon completion of the transfer of the entire number of sectors
to be transferred or upon the occurrence of an unrecoverable error. At command completion, the Command Block
Registers contain the cylinder, head and sector number of the last sector written. If an error occurs, the write
terminates at the sector where the error occurred. The Command Block Registers contain the cylinder, head, and
sector number of the sector where the error occurred. The amount of data transferred is indeterminate.
When a Write DMA command is received by the Card and 8 bit transfer mode has been enabled
by the Set Features command, the Card shall return the Aborted error.
Table 92: Write DMA
Task File Register
7
6
5
4
3
2
1
0
COMMAND
Cah
DRIVE/HEAD
CYLINDER HI
CYLINDER LOW
SECTOR NUM
SECTOR COUNT
FEATURES
LBA
D
Cylinder High (LBA23-16)
Cylinder Low (LBA15-8)
Sector number (LBA7-0)
Sector Count
nu
Head (LBA 27-24)
10.31 Write Multiple Command (C5h)
This command is similar to the Write Sectors command. The Card sets BSY within 400ns of accepting the
command. Interrupts are not presented on each sector but on the transfer of a block which contains the number
of sectors defined by Set Multiple. Command execution is identical to the Write Sectors operation except that the
number of sectors defined by the Set Multiple command is transferred without intervening interrupts.
DRQ qualification of the transfer is required only at the start of the data block, not on each sector. The block
count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode
command, which must be executed prior to the Write Multiple command.
When the Write Multiple command is issued, the Sector Count Register contains the number of sectors (not the
number of blocks or the block count) requested. If the number of requested sectors is not evenly divisible by the
sector/block, as many full blocks as possible are transferred, followed by a final, partial block transfer. The partial
block transfer is for n sectors, where:
n = (sector count) module (block count).
If the Write Multiple command is attempted before the Set Multiple Mode command has been executed or when
Write Multiple commands are disabled, the Write Multiple operation will be rejected with an aborted command
error.
Errors encountered during Write Multiple commands are posted after the attempted writes of the block or partial
block transferred. The Write command ends with the sector in error, even if it is in the middle of a block.
Subsequent blocks are not transferred in the event of an error. Interrupts are generated when DRQ is set at the
beginning of each block or partial block.
The Command Block Registers contain the cylinder, head and sector number of the sector where the error
occurred and the Sector Count Register contains the residual number of sectors that need to be transferred for
successful completion of the command. For example, each block has 4 sectors, a request for 8 sectors is issued
and an error occurs on the third sector. The Sector Count Register contains 6 and the address is that of the third
sector.
Note: The current revision of the CompactFlash Memory Card only supports a block count of 1 as indicated in the
Identify Drive Command information. The Write Multiple command is provided for compatibility with future
products which may support a larger block count.
Table 93 defines the Write Multiple command Byte sequence.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.51
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-300_data_sheet_CF-HxBK_Rev151.doc
Page 80 of 99
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